The present invention relates generally to semiconductor dies, and more particularly, to systems, methods and apparatus for forming stress relieving structures in the semiconductor die.
Semiconductor device sizes are constantly being pushed ever smaller physical size to provide lower power consumption and faster operation. The smaller devices are then packed in ever increasing densities on a semiconductor die. Conductive lines to each of the devices are typically formed in multiple metal layers such as copper or copper alloy metal layers. The density of the conductive lines in the metallization layer(s) increase to correspond to the increase in semiconductor device density.
The density of the conductive lines and conducting devices in the metallization layers is corresponds to a volume of metal as compared to the volume of insulating material in the metallization layer. As the number of conductive lines and conducting devices in a metallization layer increases, the volume of insulating material in the metallization layer decreases.
Increases and decreases in temperature of the semiconductor dies during operation cause the metallization layers to expand and contract, respectively, at rates greater than the surrounding semiconductor materials such as silicon and insulators such as silicon dioxide and other oxide layers insulating adjacent metal layers. The increases in density of the conductive lines and conducting devices in the metallization layers can also increase physical stresses in the semiconductor structure. These physical stresses can cause the semiconductor die to warp and bend and cause layers within the semiconductor die to delaminate and/or form voids that damage the semiconductor devices. The physical stresses reduce the reliability of the semiconductor devices.
In some instances the semiconductor wafer is thinned for various reasons. Thinning the semiconductor substrate can result in flexing, warping and delamination and the resulting semiconductor device damage as described above. Thinning the semiconductor substrate reduces the strength of the semiconductor wafer and thus reduces the ability of the semiconductor wafer to resist the flexing, warping and delamination stresses. The disclosed embodiments can relieve at least a portion of the physical stresses caused by variations in density of the conductive lines and conducting devices in the metallization layers.